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Dual RF LDMOS Bias Controllers
with I 2 C/SPI Interface
MEASUREMENT VALUE
(TEMPERATURE OR CURRENT)
HIGH THRESHOLD
LOW THRESHOLD
ALARM OUTPUT
OUTPUT-
COMPARATOR MODE
(ACTIVE LOW)
OUTPUT-
INTERRUPT MODE
(ACTIVE LOW)
TIME
FLAG REGISTER
READ
Figure 10. Hysteresis-Threshold-Mode Timing Diagram
Table 3. TH1 and TH2 (Read/Write)
FLAG REGISTER
READ
TIME
D15
D14
D13
D12
D11
(MSB)
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
(LSB)
POR
Bit Value
(°C)
X
X
X
X
X
X
X
X
0
-256
1
+128
1
+64
1
+32
1
+16
1
+8
1
+4
1
+2
1
+1
1
+0.5
1
+0.25
1
+0.125
X = Don’t care.
IH1 and IH2 (Read/Write)
Write to Channel 1 and Channel 2 High-Current-
Threshold registers by sending the appropriate write
command byte followed by data bits D15 –D0 (see
Table 5). Bits D15–D12 are don’t care. Read channel 1
and channel 2 high-current thresholds by sending the
appropriate read command byte. Channel 1 and
Channel 2 Current-Threshold registers are compared to
ADC readings at PGAOUT1 and PGAOUT2. Use the
following equation to find the required threshold code
for a specified threshold current:
where I DRAIN is the current threshold in amperes,
R SENSE is the sense resistor, Av PGA is the voltage gain
of the PGA, V REFADC is the ADC reference voltage, and
I THRESH is the resulting threshold register value
in decimal.
IL1 and IL2 (Read/Write)
Write to Channel 1 and Channel 2 Low-Current-
Threshold registers by sending the appropriate write
command byte followed by data bits D15 –D0 (see
Table 6). Bits D15–D12 are don’t care. Read channel 1
and channel 2 low-current thresholds by sending the
I THRESH = I DRAIN × R SENSE × Av PGA ×
4096
V REFADC
appropriate read command byte. Channel 1 and
Channel 2 Low-Current Threshold registers are com-
pared to ADC readings at PGAOUT1 and PGAOUT2.
28
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